Microelectronics has been at the forefront of technological advancements, driving innovations in 
electronic devices for decades. The traditional monolithic System-on-Chip (SoC) design, where most 
essential components of a complete semiconductor system are integrated onto a single chip, has 
been the cornerstone of microelectronic development. However, as the demand for higher 
performance (e.g. in computing) and diverse functionalities (e.g. MEMS, photonics) surged, the 
limitations of monolithic SoCs became apparent. To address these challenges, the industry is shifting 
towards a more flexible and powerful approach known as heterogeneous integration, referring to the 
use of advanced packaging technologies to combine smaller, discrete chiplets—tiny integrated circuits 
that contain a well-defined subset of functionality—into one System-in-Package (SiP). This proposal 
for large-scale research infrastructure addresses the need for daily-access to advanced packaging 
technologies, to allow the consortium partners to retain their leading positions in diverse 
semiconductor research domains. 
The proposed advanced packaging pilot line will allow for a plug-and-play “Lego-like” assembly of a 
variety of chiplets onto a single package, providing several critical capabilities for research in 
integrated photonics, wireless communication, artificial intelligence, and MedTech; thereby serving 
academia, deep-tech startups, and innovators within the EU ecosystem.